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NXP推出TDA19977A、TDA19977B三输入HDMI 1.4a兼容接收器

关键词:NXP TDA19977A TDA19977B HDMI 1.4a兼容接收器

时间:2013-05-24 09:56:54      来源:中电网

NXP推出TDA19977A、TDA19977B三输入HDMI 1.4a兼容接收器,并具有嵌入式EDID存储器。其内置的自适应均衡器,提高了信号质量,并可以使用最大长度为25 m的电缆(实验室测试0.5毫米(24 AWG)电缆,每秒2.05 gigasamples)。

The TDA19977A; TDA19977B is a three input HDMI 1.4a compliant receiver with embedded EDID memory. The built-in auto-adaptive equalizer, improves signal quality and allows the use of cable lengths of up to 25 m which are laboratory tested with a 0.5 mm (24 AWG) cable at 2.05 gigasamples per second. The HDCP (TDA19977A only) key set is stored in non-volatile OTP (One Time Programmable) memory for maximum security. In addition, the TDA19977A; TDA19977B is delivered with software drivers to ease configuration and use.

Select Features and Benefits

Complies with the HDMI 1.4a, DVI 1.0, CEA-861-D and HDCP (TDA19977A only)1.4 standards

Three independent HDMI inputs, up to the HDMI frequency of 205 MHz

Embedded auto-adaptive equalizer on all HDMI links

EDID memory: 253 shared bytes and three bytes dedicated to each HDMI input

Supports color depth processing (8-bit, 10-bit or 12-bit per color)

Complies with the HDMI 1.4a, DVI 1.0, CEA-861-D and HDCP (TDA19977A only)1.4 standards

Three independent HDMI inputs, up to the HDMI frequency of 205 MHz

Embedded auto-adaptive equalizer on all HDMI links

EDID memory: 253 shared bytes and three bytes dedicated to each HDMI input

Supports color depth processing (8-bit, 10-bit or 12-bit per color)

Color gamut metadata packet with interrupt on each update, readable via the I²C-bus

Up to four S/PDIF or I²S-bus outputs (eight channels) at a sampling rate up to 192 kHz with IEC 60958/IEC 61937 stream

HBR audio stream up to 768 kHz with four demultiplexed S/PDIF or I²S-bus outputs

HBR streams (compatible with DTS-HD master audio and Dolby TrueHD up to eight channels due to HBR packet for stream with a frame rate up to 768 kHz) support

DSD and DST audio stream up to six DSD channels output for SACD with DST audio packet support

Channel status decoder supports multi-channel reception

Improved audio clock generation using an external reference clock

System/master clock output (128/256/512 × fs) enables the use of the UDA1334BTS

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