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NXP多路复用器/解多路复用器开关芯片CBTL05023

关键词:NXP 多路复用器/解多路复用器开关芯片 CBTL05023

时间:2013-06-05 15:29:27      来源:中电网

CBTL05023是一个复用器/解复用器开关芯片,用于DisplayPort v1.2信号和10 Gbit / s信道的控制信号。 10 Gbit / s信道并不通过此开关。此芯片提供BIASOUT输出控制信号,和直流偏置下拉电阻,以协调外部10 Gbit / s信道

The CBTL05023 is a multiplexer/demultiplexer switch chip for DisplayPort v1.2 signals and the control signals of a 10 Gbit/s channel. The 10 Gbit/s channel does not pass through this switch. This chip provides BIASOUT output control signal, and the DC-biasing pull-down resistors to facilitate an external 10 Gbit/s channel.

The AUX MUX is a 2 : 1 switch with CA_DETect pin selecting between AUX and DDC (Direct Display Control) signals.

The DP MUX is a 2 : 1 switch that selects between DPML (DisplayPort Main Link) and LSTX/LSRX signals.

This chip also includes three control signal buffers: HPDOUT, CA_DETOUT and BIASOUT.

CBTL05023 is powered by a 3.3 V supply and it is available in 3 mm x 3 mm HVQFN24 package with 0.4 mm pitch.

Selected Features

The input of the HPDOUT (Hug Plug Detect output) buffer is 5 V tolerant HPDOUT, CA_DETOUT and BIASOUT buffers CA_DET input leakage current < 0.1 μA to prevent driving the 1 MΩ pull-down to a HIGH level BIASOUT buffer is able to provide enough current to drive the bias circuit for the PIN diode path BIASOUT buffer can drive up to six sets of bias circuits for the 10 Gbit/s paths When AUXIO_EN is LOW or (BIASIN = 0 and DP_PD = 1), this chip is in Sleep mode AUXIO+ and AUXIO- of AUX MUX are disabled CA_DETOUT and HPDOUT buffers are on When the chip is in Sleep mode, CBTL05023 will consume < 3.5 mW Patent-pending high-bandwidth analog pass-gate technology Very low intra-pair differential skew (5 ps typical) All channels have back current protection All channels support rail-to-rail input voltage CMOS input buffer with hysteresis Single 3.3 V ± 10 % power supply HVQFN24 3 mm x 3 mm package, 0.4 mm pitch, with exposed center pad for thermal relief and electrical ground ESD: 2500 V HBM, 1250 V CDM Operating temperature range: 0 °C to 85 °C

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